Currently, high performance Controlled Collapse Chip Connection (C4) chips are tested at the wafer level using TFI (thin film interposer) probes. These probes are rigid. The C4 height within a chip typically varies by approximately 0 to 40 microns. In order to contact all the C4s, it is necessary to apply considerable force to deform the solder bumps.
FIG. 1 shows an exemplary prior art TFI approach. A printed circuit board (PCB) 102 used for test purposes is interconnected with C4 contacts 112 on a chip site of a wafer 114 using an MLC (multi-layer ceramic) space transformer 104, pedestal 108, mounting disk 106, and IPP (interface pellicle probe) 110. The mounting fixture is omitted for clarity and brevity.